Hi, my name is

Garrett.

I love engineering.

A computer engineer with a passion for chips. I love low-level software and high-level hardware, especially whenever the two intersect.

About Me

Who I am:

I was born and raised in Cincinnati, Ohio, a city I’m proud to call home even as I embrace opportunities to experience new places and cultures. My journey has been shaped by a passion for travel, sports, and music, each contributing to my curiosity, adaptability, and collaborative spirit. Whether navigating a new city, engaging with diverse teams, or playing music with friends, these experiences have deepened my ability to connect with people from all walks of life. These interests outside of engineering have broadened my perspective, encouraging creative problem-solving and a balanced approach to my professional work. I’m known for my enthusiasm, open communication, and willingness to jump into new challenges with energy and positivity. At the core, I believe in bringing authenticity and a sense of fun to every environment—qualities that, I’ve found, help build strong, effective teams and lasting professional relationships.

What I Do:

I am a computer engineering student at the University of Pennsylvania with a strong interest in chip design and computer systems. My academic background bridges both hardware and software, and I am particularly passionate about working at the intersection of these fields. Although my studies often involve late nights troubleshooting in the lab or analyzing waveforms, the experience of bringing innovative projects to life continually fuels my desire to push boundaries and contribute new ideas to the field.

I am currently working full-time in the CyberSavvy Lab under Professors Jinf Li and Andre DeHon, where I am responsible for turning our FPGAs into cloud resources using Docker and Kubernetes.

Tools and Programming Languages:
  • Docker
  • Kubernetes
  • SystemVerilog
  • Java
  • SPICE
  • Electric VLSI
  • git
  • Bash scripting
  • Linux CLI
  • Python
  • Kotlin
  • OCaml
  • Positive attitude
  • Infectious enthusiasm

Intern

May 2025 - present
Research Assistant
Setting up cloud communication between FPGAs for easy deployment and updates. Extensive use of Docker and Kubernetes to containerize and manage applications. Setting up systems such as NFS servers, QEMU VMs, and Tio device monitors.
May 2024 - Aug 2024
Quality Assurance and Developer Relations Intern
Testing for bugs in new releases and focusing heavily on the power-user experience. Identified several critical bugs and helped polish the app in preparation for a paid model.
Aug 2024 - Dec 2024
Teaching Assistant
Held recitations and office hours for CIS 2400 Intro to Computer Systems, a bottom-up course covering transistors, logic gates, boolean algebra, assembly, and C. Created an additional conceptual office hours that I taught during the weekend.
Aug 2024 - present
Residential Advisor
Hold events for my residents every month under a strict budget. “On call” for several days in the semester - basically, if anything happens I am called in to document the event and report it to my supervisor.

Education

2023 - 2027
BSE in Computer Engineering
University of Pennsylvania, School of Engineering and Applied Sciences

Extracurriculars

  • Penn Latin and Ballroom Dance
2019-2023
High School
Walnut Hills High School

Extracurriculars

  • Varsity tennis player for 2 years.
  • Flutist for the school band for several years (as well as solo work).
  • Volunteer math tutor for local 8th graders.

Projects

RISCV Processor
SystemVerilog RTL Computer Architecture
RISCV Processor
A multicycle, pipelined RISCV processor built using SystemVerilog. Implements a cache with the Arm AXI4-Lite protocol for data and instruction memory.
SRAM Core
VLSI Digital IC Cadence Memory
SRAM Core
A 64-bit SRAM core built and tested using Cadence. Peripheral circuits include a two-phase clock, bit prechargers, row and column decoders, and I/O data bus registers.
Music Transposer
Embedded Systems Bare Metal C Low Level Graphics
Music Transposer
Embedded systems project that takes in an input melody and outputs the same melody with a number of half-step shifts determined by the user. Includes an LCD screen that displays the shifted note. Programmed with bare metal C on the ATMega328PB.
Metal Detector
Analog IC PCB Layout Soldering SPICE
Metal Detector
A custom metal detector using a PCB that I routed (not my best work), soldered (when I paid for my mistakes), and tuned myself. Design uses two oscillators, a mixer, several CS Amps, a CG Amp, and a CD Amp for output.
8-Bit Ripple-Carry Adder
VLSI Digital IC SPICE
8-Bit Ripple-Carry Adder
An 8b RCA designed from scratch using VLSI tools and simulated using Ngspice. Tested for correctness and optimized for performance.

Get in Touch